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ORSoC has designed a development kit for the OpenRISC processor. This kit enables easy access to the OpenRISC platform and gives the designer a fast start.
The development kit includes the following:
FPGA (CPU) board: The board is shipped with a pre-defined System on Chip design and includes everything to have a CPU system up and running in no time.
I/O board: This is a companion board to the FPGA board. The boards may be mounted together via fixed-connectors. The I/O board contains several IOs useful for development of many different products/applications i.e. Ethernet, USB, Audio, GPIO, GPs, etc.
JTAG-USB debugger: The USB to JTAG debugger is aimed at debugging OpenRISC based systems. One or more OpenRISC processors can be controlled over a JTAG interface by easy connection to a USB host. A local proxy server handles the USB connection and offers a TCP connection to a software debugger.
VMware-image for easy start, including tool-chain and simulation.
For more information about the different products please click the link below.
-- FPGA board --
-- I/O board --
-- JTAG-USB debugger --
The OpenRISC development kit (platform), in combination with the VMware-image, has been designed to provide engineers an easy path to run the OpenRISC processor in "real" hardware. The VMware-image and OpenRISC development board enables engineers to be up and running extremely fast, basically instantly.
VMware image
ORSoC has bundled together both HW and SW, in order to simplify for engineers to "get started" with the OpenRISC processor.
An Ubuntu Linux VMware-image is available at OpenCores and contains the following:
OpenRISC SoC reference Verilog design (OR1200 processor with peripherals, Verilog test-bench, C-code test application)
Open source Verilog simulator (Icarus)
OpenRISC processor toolchain (GCC compiler, GDB debugger)
Architecture Simulator
Linux 2.6.19 port
You find VMware image at OpenCores. There you will also find more information about the image.
To get there, please follow the link
-- Click here --
For pricing information and orders, please visit OpenCores web shop (link).
If you are a company located in EU we recommend you to contact ORSoC directly via info@orsoc.se to avoid unnecessary costs related to VAT.
2010-08-11
ORSoC has employed Martin Wasielewski
2010-08-05
Meet us at the FPGA World conference in Kista, September 8th
2010-08-02
ORSoC has employed Olof Kindgren
2010-05-27
Update of existing product gives increased performance and lower cost
2010-03-08
ORSoC design a large OpenRISC based SoC design, running Linux
2010-01-22
ORSoC employs Tor Caesar
2009-09-01
Live demo of an OpenRISC processor SoC: FPGAWorld, Kista 10th of September 2009
2009-08-03
ORSoC enter into a new big conversion project
2009-05-12
ORSoC employs Krister Karlsson
Telephone: +46 8-24 84 04 Fax: +46 70-711 06 37 Email: info[at]orsoc.se Address: S:t Göransgatan 63 SE-112 38 Stockholm SWEDEN
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