This is a brief presentation of some of the interesting projects ORSoC has worked in and being responsible for. For further information and details please contact us.

H.264 Video Encoding
ORSoC is contributing to the development of a HDTV video encoder for the important standard H.264 (AVC). H.264 is one of the latest established video coding standards and it is intended for both video storage (Blue-ray Disc) and video transport over packet-based and streaming networks. The assignment includes evaluation of the central algorithms (such as ME, MC, intra-pred, CABAC, etc) and specification of encoder architectures suitable for FPGA implementation.

Retargeting of complex FPGA design from Xilinx Virtex5 into an Altera Hard Copy
ORSoC has retargeted an existing FPGA design, implemented in a Xilinx Virtex5 device into an Altera Hard Copy device in order to reduce cost. The original design is complex and it is important that the exactly same functionality is assured in the converted design. The project involved the following competence areas:

• Project management

• Modification of technology specific parts of the current design (Memory, I/O etc)

• Front end design (Modification of RTL design for top level, I/0 ring design)

• Back end design (synthesis, placement, routing, layout, timing for new target technology)

• Verification

• Prototyping

• Development of an interposer board that adapts the Altera FPGA to the current Xilinx footprint.

Embedded software development for unique, high performance, hardware product towards the media industry
ORSoC is engaged to support the customer in a hardware development project. The assignments mainly include embedded software development for soft processors in an FPGA to assure the communication between the hardware and the software application. The product has high performance requirements and the assignment required expertise within NIOS-processor and the Quartus development tool, TCP/IP socket programming as well FPGA design with VHDL.

Floppy drive plug-in compatible
To extend the life time of industrial equipment ORSoC has designed a plug-in compatible to various types of floppy drives ranging from 5¼" to 3½" with storage capacity from 360kB to 2MByte. The design uses SD FLASH card as storage media. Each SD card replaces 200 floppy disks. For this project ORSoC were responsible both for FPGA designs and PCB layout. First products shipped to end customers. These are used as spare parts for the ABB Robotic product line S3 and S4. Design is based on an OR1200 CPU with additional dedicated hardware codecs for MFM and MMFM line coding. This design uses ORSoC developed wishbone system bus generator ISoC. This product uses the ORSoC OR1200 CPU board with ACTEL ProASIC3 FPGA, 8MByte SDRAM, 1Mb SPI FLASH and up to 2GByte SD FLASH card. The CPU board has a connector for the ORSoC JTAG debugger and serial console.

Pres-study and architectural design for ASIC project
ORSoC supports a customer with expertise in “pre-study” work for a big ASIC project. The work will result in decision of how to design the product to achieve best possible performance and in the same time assure future proof design that can handle different standards. ORSoC is also involved in work of setting up the design environment including verification strategies.

Cost & Performance improvements of PBX system
ORSoC have developed a SoC design that enables the customer to offer PBX system with improved functionality. Multiple external components (ASIC's) was integrated into the design, providing cost reduction and the option to use the same device on multiple boards, meaning higher volumes and lower BOM cost (Bill Of Material). The design includes OpenRISC 32-bit processor, Memory Controllers, HDLC, UART, SPI, GPIO and Custom Blocks.

ASIC design in large ASIC development project
ORSoC is assigned to participate in large ASIC development project. The project includes design and verification of one of the bigger cores in the ASIC. This project require expert skills within VHDL design and verification as well as good knowledge of the standards used in the mobile telecom industry. The projects involves many people which makes it important to work in a structured way in a project team and follow the development models sued by the customer.

Design for precise time measurement
ORSoC have designed a device for precise time measurement for a customer. The customer is a world leader in time and frequency counter. The implementation plays a major role within the measurement system. Focus for this implementation were extremely low jitter on clock distribution. Target technology: eASIC Nextreme.

Development of PBX Group Switch
ORSoC have redesigned/optimized a group switch, centralized in one of the worlds best PBX systems. The design plays a critical part of the system due to the fact that all data traffic are going through the grop switch are processed in real time.

Reverse engineering of "End Of Life" FPGA
ORSoC have developed a functionality equivalent design from scratch, meaning redesign of an existing FPGA design without access to RTL files. The redesign was needed due to "End Of Life" issues for the old FPGA and since the product still in production.

ASIC timing error verification
ORSoC helped this customer too investigate why their ASIC was malfunctioning sporadically. This error occurred after they transferred the ASIC to another ASIC process.