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OpenRISC Development Kit
ORSoC has designed a development board for the OpenRISC processor. This board enables easy access to the OpenRISC platform and gives the designer a fast start. The board is shipped with a pre-defined System on Chip design and includes everything to have a CPU system up and running in no time.
The development kit includes the following:
CPU board with preconfigured ACTEL ProASIC3 FPGA
Built-in FLASH based bootloader
SPI FLASH with end application
32 MByte SDRAM
SD/MMC connector for high capacity FLASH storage (up to 2Gbyte)
8 LED for debugging purposes
10 pin header with two SPI channels
JTAG configuration header
Debug header with serial console and JTAG debug
General purpose IO
The board is 75x50 mm and contains two 40-pin 2mm headers and a 10 pin header with power supply signals. The board has local DC/DC converters for all nescessary supplies and needs only 3.3V external supply. The board is intended to be placed on a carrier board which contains external connectors.
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More information:
Click the links to open pdf-documents in an external window.
- Flyer (pdf)
- Startup guide (pdf)
- Data sheet (pdf)
For quotes and orders, please contact us by
Phone: +46 8 24 84 04
Email: info[at]orsoc.se
2010-08-11
ORSoC has employed Martin Wasielewski
2010-08-05
Meet us at the FPGA World conference in Kista, September 8th
2010-08-02
ORSoC has employed Olof Kindgren
2010-05-27
Update of existing product gives increased performance and lower cost
2010-03-08
ORSoC design a large OpenRISC based SoC design, running Linux
2010-01-22
ORSoC employs Tor Caesar
2009-09-01
Live demo of an OpenRISC processor SoC: FPGAWorld, Kista 10th of September 2009
2009-08-03
ORSoC enter into a new big conversion project
2009-05-12
ORSoC employs Krister Karlsson
Telephone: +46 8-24 84 04 Fax: +46 70-711 06 37 Email: info[at]orsoc.se Address: S:t Göransgatan 63 SE-112 38 Stockholm SWEDEN
© 2004-2010 ORSoC AB, All rights reserved ••• Website by: Carl Linus Unnebäck